I am Mike James, an electronic engineer.
I was born in 1963, and I can just about remember the investiture of the Prince of Wales, and the clever bit where the astronauts were talking to a Richard Nixon hanging in the sky above the moon. I was usually allowed to stay up to watch the Apollo launches on TV.
I am not the Michael James who wrote/writes columns in Computer Shopper, although I think he went to the same school, a year ahead of me, in Canterbury, Kent.
I went to University in Southampton where I used to waste hours in the Computer and Radio Clubs. I was president of the radio club for a while, and enjoyed the beer and the radio contests which involved getting hypothermia on hill tops.
They let me have a degree, and so I got a job.
I have now been married to Shirley for 22 years. We have always
worked as engineers for the same company at the same place at the same
time, but we have worked in Redhill (where I met Shirley), Mitcham and
Southampton (no guesses which electronics company).
I am a creative Electronic engineer with 24 years of experience, working in many different technical areas during my employment with Philips and NXP. This has covered both analogue and digital electronics domains from RF to ASIC and FPGA design.
In the past I have undertaken project leading roles for a digital cordless phone demonstration project, and for a radio channel simulation project in Philips Research. I have mentored and supervised many students and new graduates over the years.
I find myself often in a consultancy role within my group, as my breadth of experience enables me to make a contribution to many other projects.
I am named as inventor on five patents on RF and digital technology. :
US2008094279 : (GPS receiver) , US2002083321 : (Digital TV),
As joint inventor :US4723237 :(video/data LAN), WO2008068706 : (Flash memory management) and EP1839409 : (WiFi over wires)
I have technical strengths in Software, coding in C, yacc, lex, PERL and ARM assembly language, and digital electronics with over 10 years of experience of VHDL.
I have recent experience of Linux kernel porting and device driver implementation for complex Systems on Chip , both ARM9 and ARM1176 based. I have used pSOS on MIPS and uCOS/II on ARM. I have implemented small realtime schedulers on 8051 processors.
I have experience in GPS technology working with both software and hardware based receiver architectures, DSP and digital audio, optical disc and mobile communications technologies including RF and analogue work. I have implemented several system simulators coded in C, VHDL and Pascal for communications and digital signal processing systems.
My VHDL skills have been used for System on Chip and FPGA/CPLD technology. I have written an FPGA partitioner and pin assignment tool once considered by a CAE vendor as a product.
Until recently my device architecture for a CDROM block decoder (SAA7391 and derivatives) was the at the core of Philips Semiconductors CDROM and DVDROM products.
I have presented papers at international conferences, both publicly and internally within Philips and NXP
I represent my employers at Portsmouth University, on the Electronics Department Industrial Advisory Board, and on the South East EKTN steering board.
Career so far : I joined Philips Research in 1984. Transferred to Philips Semiconductors Mitcham 1989. Relocated to Philips Semiconductors Southampton 1990. Sold off as NXP Semiconductors 2006. Redundant 2008. In more detail:
Bringing up Linux on a new ARM1176 System on Chip (pnx4010),
Performing device evaluation,
Working on u-boot bootloader code, complex clock setup, kernel drivers
Setting up a linux host machine to build an OpenEmbedded distribution for the platform.
Software Defined Radio:
Began work on GNURadio Software defined radio for a research project but stopped as lab closing.
Computer Vision Chip:
Worked on NXP Research “Xetal” vision chip evaluation,
Writing Linux device drivers using Xetal as a input layer device for hand tracker application.
Bringing up Linux on a new ARM926 System on Chip (pnx4008/lpc3180). Bootloader
Responsible for defining device drivers required to develop use cases presented by a customer,
Support an EU funded project within Philips.
Worked with other engineers in implementation of new device drivers,
Modified existing drivers to work with Philips IP blocks.
Worked on new SPI device driver system which we had hoped to propose for inclusion in embedded Linux kernel source trees.
Worked on 802.11b/g wireless LAN product, porting a Linux device driver from WinCE or a 2.4 kernel on TI OMAP to a 2.6.10 kernel for Philips device.
Hardware GPS system:
Responsible for innovation and prototyping of hardware/software IP.
Developed and implemented major improvements to performance of GPS satellite tracking software, using C and ARM/MIPS assembler.
Studied 2-D display accelerators (paralellogram/triangle based) for low cost navigation systems, built C model of operation.
Studied Dead Reckoning (no GPS signal) algorithms for in-car navigation using MatLab.
Produced GPS baseband data stream logger recording at 4.8Mbits/sec, with gyroscope and odometer sampling using USB chip for PC, design in VHDL, PC application in C++ Builder.
Implemented acquisition and timing hardware for software GPS receiver on Altera APEX20k1000 on ARM Integrator platform, design in VHDL.
Ported GPS tracking receiver hardware IP design to Altera APEX20K1000 on ARM Integrator.
Ported GPS software from PSOS RTOS on MIPS to uCOS/II on ARM Integrator, using ARM assembler/C, implemented RTOS independent wrapper layer.
Provided a final CPLD implementing an interface and DSP functionality to Philips Software. Project transferred to Philips Software, but decided not to transfer with the project back to Redhill.
Was part of international team that reached European Finals of Philips Semiconductors internal Quality Improvement Competition with entry based on GPS performance improvement.
FPGA partitioning software
Developed a novel tool for FPGA pin assignment and partitioning using PCB design databases for pin assignment.
This was considered by Synplicity Inc. for addition to their tools.
Some files produced by this tool have been released by ARM Ltd as reference descriptions of their Integrator family PCBs
Have much experience using VHDL (Cadence, Synopsys) with Altera Flex10k-series FPGAs on re-useable, generic PCBs including ARM Integrator systems, and with Xilinx CoolRunner CPLDs.
M6 stream cypher:
Prototyped an AV content protection cipher (M6) engine for a 1394 Firewire link using Altera EPLDs programmed using VHDL.
Wrote C control code for prototype.
Was device architect for Philips Semiconductors block decoder/encoder ICs, SAA7381 and SAA7391. Implemented a DVD error corrector using VHDL and Synopsys BC.
Created CD/DVDROM servo system coded in C using Real Time Kernel on 8052.
Supported software engineers in creating and debugging software that was running on SAA7391.
Debugged SAA7391 implementation. Produced IDE bus emulator using Altera MAX CPLDs.
Automated Production Test Sequencer:
Reimplemented VHDL code in a very short time scale for a production tester for Philips Teletext chips using Altera FPGAs. Production was able to continue. Was officially recognised by Philips for this work.
CD shock-proof FIFO:
Acted as breadboarding consultant on an FPGA based breadboard based on reusable FPGA tiles containing 8 devices. As a result began developing the FPGA pin assignment tool.
Digital Compact Cassette/MPEG 1:
Involved in specification, simulation, design and VHDL coding for parts of an MPEG audio CODEC (quantizer and scaler DSP), audio de-emphasis filter and IEC958 output blocks for the Philips Digital Compact Cassette (DCC) system using VHDL.
Performed discrete-time analog simulations using VHDL of IEC958 clock recovery PLL.
Wrote a VHDL testbench stimulus system based on use of Mentor SCL files.
Wrote a reference system simulation in C of signal processing path for DCC, which was used to validate VHDL designs for the device.
Crystal Oscillators Simulation:
Simulated crystal oscillator for use in a Teletext decoder IC.
Worked on hardware and software to evaluate ADCs used in DCC player silicon
Performed a study on the creation of a Soundblaster clone device.
Responsible for one other engineer: together we designed and built breadboard for a CT2 baseband chip. Worked on 900 MHz RF and IF circuits that interfaced to it.
DECT system study:
Began systems work on a DECT baseband chip, work became part of Philips DECT solution.
Transferred to Southampton to continue in the Systems Laboratories.
TACS Analogue Cellular Radio:
Responsible for one other engineer : researched and implemented efficient (class E and F) RF power amplifiers for TACS Cellular Radio. Compared these with existing production modules.
VHF Private Mobile Radio:
Responsible for one other engineer: Researched and implemented auto antenna tuners for portable VHF PMR handheld transceivers.
GSM Channel modelling :
Project leader of small project near end: simulated Rayleigh and Rician fading models of a Radio channel in Pascal, and TMS 320C10 DSP assembler for real time emulation.
Presented research paper at ISCAS 1988 in Helsinki on a low complexity phasing method digital SSB generator derived from channel modelling filters. A patent was later granted (later lapsed).
CRC checker ASIC :
Designed and implemented CRC checker on test chip ASIC.
Video & Data LAN :
Worked on control software and hardware, using LSTTL and simple twisted pair or coaxial cabling.
Designed and implemented analog equalisers to drive coaxial cable.
Created user interface software written in C running on Z80.
Designed and built a terminal multiplexer to allow the use of a single serial port shared between up to eight users served one at a time.
Worked on a novel transmission scheme for video and data across the LAN for which a patent was granted.
Digital IC tester development
Simulated IC tester in Pascal on ICL Perq workstation, and then wrote driver software in BCPL and built interface hardware to move an IC test prober head..
Philips: Completed courses in C++/SystemC (Doulos), VHDL, C Programming (Philips), Altera QUARTUS/APEX (Esperan), Xilinx for ASIC designers (Arcobel/Xilinx), Project Planning, Marketing and Communication, Time Management, Managing Personal Relationships, Intercultural Awareness.